Automatic Refactoring for Parallelization

In modern software, adaptions like the parallelization are necessary to fully leverage the CPU's capabilities. However, the parallelization introduces a new range of possible software faults. Thus, assisting utilities like static code analyzers are desirable. For instance, ones that inform engineers about the code fragments that can be safely adapted.
This thesis focuses on loops and introduces a conservative approach to verify that these can be parallelized. More specifically, it allows proofing that array accesses do not conflict between iterations. The procedure is a data flow analysis, which proofs the absence of conflicts by employing rules for a selection of binary expressions. Furthermore, its design allows it to profit from various code optimizations automatically.
Experimental evaluations show that both, the prototype and the data flow analysis itself, do not incorrectly identify loops as parallelizable. Moreover, it pinpoints that the analysis can correctly identify most of the parallelizable loops, and only a negligible amount requires a more mature approach.